EDN

Solving FPGA I/O pin assignment challenges

Editor's Note: I've long been impressed by Xcell Journal from Xilinx, both for the quality of its production and the quality of its articles. A few weeks ago we looked at an article on Replacing ...
EDN

Internal test in FPGA design

http://www.xilinx.comAs the density of field-programmable-gate arrays (FPGAs) continues to increase, engineers are challenged to come up with ways to test and verify ...
Electronic Design

Embedded: Module Blends USB With FPGA

Want to build a custom USB-based interface such as a USB-to-GPIB bridge? Check out the ZestSC1. The 7.5- by 12.5-cm module contains a USB controller, a Xilinx Spartan-3 1000 FPGA, 8 Mbytes of SRAM, ...
Design-Reuse

FPGA design from the outside in

FPGAs enable everyone to be a chip designer. This installment shows how to design the bus interface for a generic peripheral chip. When designing with an embedded microprocessor, you always have to ...
Geeky Gadgets

PYNQ Z2 Python FPGA board now includes Raspberry Pi Header and 24-Bit Audio Codec

The development team at Digilent responsible for the PYNQ Z2 Python FPGA board which measures just 140 x 87mm in size, have this week announced a few new improvements to the board in the form of a ...
Electronic Design

FPGA Q&A: Lattice Semiconductor

Electronic Design held a series of Q&A sessions with several major FPGA companies. Here, our roundtable discussion with Lattice Semiconductor included Bertrand Leigh, director of applications ...