- Productive: Designed for maximum engineering productivity and time-to-market acceleration for connecting semiconductor IP blocks and sub-systems for Arm and RISC-V-based designs, accelerating time ...

Arteris (AIP) system IP facilitates the seamless integration of functional safety solutions in automotive systems. The ISO 26262 functional safety certification for Ncore cache coherent interconnect ...

As the number and variety of computing elements in SoCs grow, specific application areas require the tight connection of key processing elements through coherency. Ncore Interconnect IP from Arteris ...

Many people have heard the term cache coherency without fully understanding the considerations in the context of system-on-chip (SoC) devices, especially those using a network-on-chip (NoC). To ...

As the number and variety of computing elements in SoCs grow, specific application areas require a tight connection of processing elements through coherency. Interconnect IP makes cache coherent SoC ...